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We have officially Kickstarter-ed our project, check it out!


In other exciting news, the bladeRF was used as a wireless UART bridge by an early access tester!



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Yet another January update


We have spent the last couple of weeks further developing the platform and talking with part distributors. All of our parts at this point are in stock, and those that aren’t have reasonable lead times. We are taking these steps to ensure that if we do go to mass production there will be no hiccups.

As for some other exciting news, we recently got our hands on the first of several pieces of test equipment we will need to develop our intended examples and expansion boards. Having this sort of equipment at home is much more convenient than constantly scheduling lab time weeks in advance!




As a sanity check, we ran a conducted RF chirp on the bladeRF at 500MHz to see its maximum bandwidth capabilities. In previous experiments, we have seen about 28MHz of occupied bandwidth, which this run seems to agree with.




The spectrum analyzer was used to capture a spectrum of spurs over the bladeRF’s frequency range on the RX side. Besides the occasional spur, the noise floor of the device is surprisingly good.



Here is the same sort of spectrum capture but on the TX side, and again the spectrum looks pretty clear with the exception of a few spurs which appear to be related to the main 38.4MHz clock. Spurs this low on the TX side really don’t matter since they are so far down below the TX output power of the LMS that they will no be able to significantly interfere with any transmissions or even influence



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2013 Update

Quick announcement, we have a few spots left in our beta tester program for researchers. Requests should be sent to [email protected] along with a short bio and description of your intended application.

Thank you all for the interest you have shown, we have successfully completed our tester program. Stay tuned for updates and a big announcement in late January.


We are quickly nearing a point with software support where we will be confident in doing a general release after doing a little clean up on the code. The soon to be released software support will be completely open source and will contain VHDL and FX3 source code, Linux drivers, user mode utilities, and a simple GNURadio block.


Additionally, we’ve been making great progress on the basic modulation scheme examples. One of the introductory tutorials explains the the development of a wireless UART bridge starting from scratch. Before complicating the examples with too much embedded and driver development, we are utilizing the onboard Cyclone 4 FPGA to modulate data using FSK and demodulate it on the receiving end.

The first screenshot shows signals internal to the FPGA captured using a soft-logic analyzer known as SignalTap. Data that is received by the FPGA on fx3_uart_txd is modulated and turned into I and Q samples that are rendered using the analog visualizer in SignalTap. The FSK modem is in loopback mode in this example, this allows us to measure the group delay by counting the number of clock cycles it takes a bit to come back around, in this case it’s roughly 45 clock cycles at 100MHz, or 450ns. The demodulation signals, specifically I and Q are shown in the bottom SignalTap capture.



UART FSK modulation signals




UART FSK demodulation signals