Tx under-run reporting to application

[sergemalo]

HI all,

I am porting an application to the BladeRF, and I have the next limitation:
My application absolutely needs to be aware when a Tx buffer under-run occured. In that case, the transmission must be aborted and restarted.

I found this in the libbladeRF.h:

Code: Select all

/**
 * A sample underrun has occurred. This generally only occurrs on the TX module
 * when the FPGA is starved of samples.
 *
[b] * @note libbladeRF does not report this status. It is here for future use.[/b]
 */
#define BLADERF_META_STATUS_UNDERRUN (1 << 1)

I have read the status variable after each transmission, and I really see that this underrun flag is never raised.
Q1: Will this be supported anytime soon?
Q2: Is there another way to track buffer under-runs?
I know that LED3 turns off on when a under-run occurs, so I suppose there might be a status register in the FPGA that indicates a under-run occurred. If this is the case, is there a way to read that status register from user space?

I'm using release 2015.07 and FPGA hostedx40-034.rbf

Best regards,
Serge

[sergemalo]

Hi Jon,

Thanks for the quick answer!
The current interface would suffice for me: I just need to know if an underrun occurred, I don't need to know to exactly when it occurred.

Yes, that would be a road-block for our application; we are still in the process of evaluating the BladeRF.

Regards,
Serge

[sergemalo]

Hi Jon, thanks again for your answer.

Yes, I will email Robert and Brian today.
So far, its the only road-block we have met for our application, its looking good.

Best regards,
Serge

[jquirke]

I too would be interested in this.

I see the fifo_reader/fifo_writer expose a 64-bit counter which is wired to tx_underflow_count/rx_overflow_count respectively

However, it does not appear these counters are exposed anywhere, forgive my limited VHDL.

Would it be possible to map these counters as registers that can be read like any other register?