adding some DSP function in Tx/Rx path (Modem and Filtering)
Posted: Sat Sep 24, 2016 7:05 am
hello everyone,
i am new to BladeRF FPGA development.
i have been studying some DSP/FPGA of bladeRF for a while .
and there is some problems that need you help. thanks anyway.
1. i read the wiki about its HDL Code.
like this page : https://github.com/Nuand/bladeRF/wiki/FPGA-Development
it shows bladeRF-hosted.vhd architecture graph.
at the "where to place custom code" part, it says that we can put some DSP function block between the
iq_correction blocks and the sample/meta fifes blocks.
so i plan to read the bladerf-hosted.vhd file . want to figure out what exactly the function block doing in it .
but i am not good at using github and VHDL .
any suggestion? (by far now i just reading .vhd file on the github)
thanks for your help!!
i am new to BladeRF FPGA development.
i have been studying some DSP/FPGA of bladeRF for a while .
and there is some problems that need you help. thanks anyway.
1. i read the wiki about its HDL Code.
like this page : https://github.com/Nuand/bladeRF/wiki/FPGA-Development
it shows bladeRF-hosted.vhd architecture graph.
at the "where to place custom code" part, it says that we can put some DSP function block between the
iq_correction blocks and the sample/meta fifes blocks.
so i plan to read the bladerf-hosted.vhd file . want to figure out what exactly the function block doing in it .
but i am not good at using github and VHDL .
any suggestion? (by far now i just reading .vhd file on the github)
thanks for your help!!