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How to send and receive data to custom FPGA logic via USB
Posted: Wed Aug 17, 2022 3:28 am
by tich
I need guidance on how to send and receive data to custom logic via USB. I plan to make changes to the fifo_reader and fifo_writer.
Re: How to send and receive data to custom FPGA logic via USB
Posted: Tue Aug 30, 2022 10:31 pm
by robert.ghilduta
If you are interested in exchanging PDUs between the host PC and FPGA logic please take a look at the packet_control_t interface that the bladeRF-wiphy project utilizes. Effectively, packet_control_t is an interface for allowing fifo_writer and fifo_reader to exchange variable length payloads with the host PC (as opposed to IQ samples).