load fpga hostedx115.rbf succesful but " FPGA size UNKNOWN

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EcoKees
Posts: 5
Joined: Wed Jan 29, 2014 4:22 pm

load fpga hostedx115.rbf succesful but " FPGA size UNKNOWN

Post by EcoKees »

I use bladeRF with Windows 10 and want to use MATLAB/SimuLink
installed BladeRF with libusb drivers
Everything seems OK but MATLAB complains and I think FPGA is not correctly loaded:

bladeRF> load fpga hostedx115.rbf

Loading fpga from hostedx115.rbf...
Done.

bladeRF> info

Serial #: b436de8c8212b9aeaaeba852246866e7
VCTCXO DAC calibration: 0x8000
FPGA size: Unknown
FPGA loaded: yes
USB bus: 2
USB address: 10
USB speed: SuperSpeed
Backend: libusb
Instance: 0

bladeRF>

Why FPGA size unknown? It should be something like KLE115 , but not Unknown?
jynik
Posts: 455
Joined: Thu Jun 06, 2013 8:15 pm

Re: load fpga hostedx115.rbf succesful but " FPGA size UNKNO

Post by jynik »

Based upon your VCTCXO DAC calibration being the "default" and the unknown FPGA size, it seems like you've wiped out your flash at some point.

You can run the following in the bladeRF-cli to reflash this information. You will need to power-cycle after completing this command and exiting the CLI.

Code: Select all

flash_init_cal 115 0x8000
Do you have access to a spectrum analyzer? If so, I could give you some commands to transmit a tone so that you can use the CLI commands `set trimdac <value>` to re-calibrate the VCTCXO.
EcoKees
Posts: 5
Joined: Wed Jan 29, 2014 4:22 pm

Re: load fpga hostedx115.rbf succesful but " FPGA size UNKNO

Post by EcoKees »

thanks a lot jynik, I'll try that.

From my notes, I found:

bladeRF> version
[WARNING] FPGA currently does not have a version number.

Serial #: b436de8c8212b9aeaaeba852246866e7
VCTCXO DAC calibration: 0x9a5d
FPGA size: 115 KLE
Firmware version: 1.5
FPGA version: 0.0

I have no access to a spectrum analyser (the bladeRF is my spectrum analyser...).
The above might be used for a recalibration?
regards,
Kees
jynik
Posts: 455
Joined: Thu Jun 06, 2013 8:15 pm

Re: load fpga hostedx115.rbf succesful but " FPGA size UNKNO

Post by jynik »

Hi Kees,

Kudos to you for keeping good notes! :)

Yes, the factory calibration should still be quite good. Use 0x9a5d in that flash_init_cal command:

Code: Select all

flash_init_cal 115 0x9a5d
EcoKees
Posts: 5
Joined: Wed Jan 29, 2014 4:22 pm

Re: load fpga hostedx115.rbf succesful but " FPGA size UNKNO

Post by EcoKees »

Hi jynik,
great idea. With the factory supplied value my bladeRF was slightly offset.
I was receiving at a frequency of 430.125 MHz and had best reception at a frequency of 430.125.600 (from memory).
Then I tried other DAC-values:
0x9000 430.1256
0x9b00 430.1253
0xa800 430.1249
0x9f00 430.1252
and finally
0xa500 430.125000

It was fun trying to calculate new values (guestimates) in hexadecimal
With the value 0xa500 the SDR console V2.3 receives at exact 430.125000 . I must presume that the frequency of the dutch repeater PI2NOS is at the right published frequency.

Ok, now further with the XB-200 board. I managed to desolder two resistors (I lost them, too small...). I am lucky to have an 8656b signal generator (HP) for testing!
Thank you jynik for your help, very encouraging to have people around to correct my mistakes....

Regards, Kees
jynik
Posts: 455
Joined: Thu Jun 06, 2013 8:15 pm

Re: load fpga hostedx115.rbf succesful but " FPGA size UNKNO

Post by jynik »

Hi Kees,

I'm glad you were able to make progress on this.

If you didn't find it already, there's a set trimdac <value> command in the bladeRF-cli you can use to adjust the VCTXCO Trim DAC value at runtime (without writing it to flash).

However, if you're using SDR-Console, it unfortunately means you'd have to start the CLI, tweak it, exit, and then re-run SDR-Console. Nonetheless, this is certainly less painful than flashing and power cycling the unit.

Normally, I'm using GNU Radio (here's a live image) and Linux. I use this approach to work in the bladeRF-cli while streaming samples to a Unix Named Pipe (FIFO) that another program (e.g., a GNU Radio flowgraph, baudline) can take care of displaying for me. That allows me to tweak the VCTXO Trim DAC value and see the change in real time.

Another approach is to use the bladeRF to transmit a file containing 1+0j samples (i.e., a CSV file containing lines of 1, 0) into a signal analyzer. I then walk the trimdac value around until I'm within a few tens of Hz at 2 or 3 GHz.
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